This document describes how the 10 MHz reference clock offset is stored and loaded at startup. The RI8574A Cassini16 EPC System Controller contains a RIFL Master board (Y00063C1) that contains a crystal oscillator used to generate a 10 MHz reference clock that is distributed to all RF TIMs and used for event timing and phase lock for all RF Sources and Mixers. A similar 10 MHz reference clock is also contained in the RI8613A USB RIFL Master TIM that upgrades rev A,B,C versions of the RI8568 Cassini 16 Infrastructure.
10 MHz Reference Clock Offset Value
The 10 MHz reference clock offset value is used to tune the crystal oscillator to 10 MHz. The offset value is stored by the 10 Mhz Clock Calibration Procedure in the local Guru based on the Guru ID (ri.sys.owner attribute) and a backup is stored on the local hard drive as the "c:\RI\RiflMasterDef.cff" file. The offset value is loaded when the RIFL Master is initialized by the Cassini application, typically after choosing a Short Cut.
The integer value sets a voltage on the crystal that allows it to be tuned. The offset value is migrated from the old Guru ID to the new Guru ID by following the EPC Exchange (Guru ID) procedure.
Example
RiflMasterDef.cffMeasurement Impacts
All "RF System" TIMs like the RI7725 20 GHz RF Sources have internal crystals that drift over time, if the source or RIFL Master in the EPC drifts 300 Hz away from the 10 MHz reference (i.e. 10.3 MHz or 9.7 Mhz), the source(s) may not be able to acquire phase lock and will fail a Self Test and may cause other TIMs to fail Diagnostics in misleading ways. Other TIMs use the 10 MHz reference clock directly and multiply or divide the signal to reach the operating frequency or use it for timing to coordinate execution events with other TIMs (i.e. Device Power TIM controls the DUT while making measurements with the Receiver).
Hardware Requirements
RI8568B Cassini 16 Infrastructure
RI8574A EPC Controller for Cassini16
Y00063C1 RIFL Master IDE 1
RI7725 20 GHz RF Sources (AUX Rack)
Measuring the 10 MHz Clock
The 10 MHz clock is distributed from the RIFL Master to every TIM slot and is exposed as a MCX connector on most carriers found in the Fixture and TIM. Hook up a calibrated frequency counter or VNA to any of these ports to measure a 10 MHz sine wave. If the frequency is not +/- 5 Hz, adjust the value.
Adjusting the 10 MHz Clock
Launch Guru and the latest available ShortCut. Open the equipment pool window (System > Equip > Nodes). Highlight Master and choose Pool > Correct 10 MHz. The tester will open a dialog with the current reference offset value. Change the reference offset. And integer value change of 5 in the reference offset represents roughly 1 Hz change in the time base. Choose OK. Repeat until the frequency is 10 MHz +/-1 Hz. Open the module browser window (from the Equipment Pool window, select Pool > Control Modules), highlight Master and choose Node > EE Save Node Info. When it asks if you're sure, select Yes. This saves the offset to the local Guru and the C:\RI\RiflMaster
Calibrating the 10 MHz Clock
See Product Docs - Calibrating the Cassini Time Base 10 MHz Oscillator for detailed instructions and standard reference equipment.
Retrace Specifications for 10 MHz Clocks
P/N MK4LML3A RFX TX9214-2000-001
Long Term Drift Spec: 3pp per day, Cal should be valid for 10 years
TX9214-2000-001.pdfWarmup Short Term Drift Spec: Approximately 1 hour (60 minutes) until stable clock is reported. (3pp per minute)
Warm Up Charts showing drift in time with two units (typical performance)
TX9214_RETRACE_1.pdf
TX9214_RETRACE_2.pdfP/N G7SYHX2B OSC, 100MHz OCXO
Wenzel 500-13428
G7SYHX2B_500-13438.pdfInternal Notes: (Not visible online)
Many EPCs manufactured with outdated RIFL Master programming. Investigation to identify candidate systems has not been started. -Ryan